The Role:
We are looking for a Power Design Engineer to own the power delivery architecture and implementation for our accelerator PCBs used in data center servers for HPC and AI/ML workloads. You will be responsible for high‑current, high‑efficiency VRM design, power tree definition, and ensuring robust power integrity for advanced accelerator SoCs and high‑speed memory.
Responsibilities:
- Architect and design the power supply and board-level power delivery network (PDN) for accelerator cards and related platforms:
- Define power trees, rails, sequencing, and margining
- Select VRMs, DC‑DC converters, controllers, FETs, magnetics, and protection components
- Investigate PCB technology options and define power delivery strategies for high-current, low-voltage environments
- Enable the supply chain and work with suppliers over the full lifecycle
- Perform schematic design for power stages and collaborate with layout engineers to ensure proper placement, routing, and copper utilization for high‑current paths.
- Work closely with PI/SI engineers on PDN impedance, decoupling strategies, and transient performance.
- Specify and guide power-on sequencing, monitoring, and telemetry (PMBus, I2C, etc.).
- Conduct lab validation of power subsystems:
- Efficiency, ripple, transient response, stability
- Load/line regulation and thermal performance
- Lead debug of power-related issues (e.g., startup failures, droop, noise coupling, OCP/OVP events).
- Collaborate with silicon, hardware, system, reliability, and manufacturing teams to ensure design-for-reliability (DFR) and design-for-manufacturability (DFM) of power solutions.
- Generate design documentation, test plans, and bring‑up procedures.
Required Qualifications:
- Bachelor's and Master's degree in Electrical Engineering or related field.
- 5 years of experience in board-level power design for high‑performance or server‑class systems.
- Strong understanding of:
- Switching power converters (buck, multiphase, POL regulators)
- Power topologies, compensation, and stability
- High‑current layout techniques and loss optimization
- Hands‑on experience with schematic capture (e.g., Siemens Xpedition) and familiarity with PCB layout constraint definition.
- Proficiency with lab equipment (oscilloscopes, electronic loads, power analyzers, DMMs).
Preferred Qualifications:
- Experience designing power delivery for GPUs, CPUs, FPGAs, or custom accelerators in data center environments.
- Familiarity with PI simulation concepts and tools (e.g., CADENCE PowerSI, PowerDC, OptimizePI, VRM simulation (SIMetrix/SIMPLIS), etc.).
- Working knowledge of server power standards, hot‑plug, derating, and redundancy considerations.
- Relevant experience in Long-Term Reliability prediction and testing (e.g., MTBF, FMEA, FIT, HTOL/HAST).
- Compliance, Certification and Regulatory requirements knowledge for Power Delivery Designs and Qualification.
- Experience with PMBus configuration and debugging.
- Basic scripting skills for test automation (Python, LabVIEW, etc.).
What do we offer?
- Join an innovative team and experience company growth.
- We believe in investing in our employees and providing them with the opportunities they need to grow and develop their careers.
- Enjoy a hybrid work environment.
- We also offer flexible schedule.
- We offer a remuneration that values your experience.
- The position will have preferably the base in Karlsruhe (Germany).
We are looking for outstandingpeople willing to join our mission to change this industry and help to build a better world.
If you feel identifiedwith Openchip, please contact us. We can offer a competitive compensation package in a flexible work schema that will help you to keep a balance between your personal and professional life.
At Openchip & Software Technologies S.L., we believe a diverse and inclusive team is the key to groundbreaking ideas. We foster a work environment where everyone feels valued, respected, and empowered to reach their full potential -- regardless of race, gender, ethnicity, sexual orientation, or gender identity.
